FIGS. 7A and 7B are circuit diagrams each showing an example of a conventional charge pump circuit. FIG. 7A shows a positive step-up (by a factor of 2) charge pump circuit, and FIG. 7B shows a negative step-up (by a factor of −1) charge pump circuit.
The charge pump circuits 100 and 200 shown in FIGS. 7A and 7B are so configured as to generate a desired output voltage Vout from an input voltage Vin by turning on or off the switches 101 to 104 and the switches 201 to 204 in cycles with predetermined timing.
A more specific description will now be given of the positive step-up operation by the charge pump circuit 100.
First, when the switches 101 and 104 are turned on and the switches 102 and 103 are turned off, an input voltage Vin is applied to one end (point A) of a first capacitor 105, and a ground voltage GND is applied to the other other end (point B) of the first capacitor 105. Thus, the first capacitor 105 is charged until the potential difference across the first capacitor 105 substantially reaches the level of the input voltage Vin.
When the charging of the first capacitor 105 is completed, the transistors 101 and 104 are turned off and the switches 102 and 103 are turned on. By this switching, the potential at point B is increased from the level of the ground voltage GND to the level of the input voltage Vin. Here, since a potential difference equal to the input voltage Vin has been applied across the first capacitor 105 through the charging described above, as the potential at point B is stepped up to the level of the input voltage Vin, the potential at point A is stepped up to the level of 2Vin (the input voltage Vin+the charged voltage Vin).
Meanwhile, since point A is connected to a ground terminal via the switch 102 and a second capacitor 106, the second capacitor 106 is charged until the potential difference across the second capacitor 106 substantially reaches the level of 2Vin. As a result, a positive stepped-up voltage 2Vin obtained by positively stepping up the input voltage Vin by a factor of 2 is derived as the output voltage Vout.
Next, a more specific description will be given of the negative step-up operation by the charge pump circuit 200.
First, when the switches 201 and 203 are turned on and the switches 202 and 204 are turned off, the input voltage Vin is applied to one end (point C) of the first capacitor 205 and the ground voltage GND is applied to the other end (point D) of the first capacitor 205. Thus, the first capacitor 205 is charged until the potential difference across the first capacitor 205 is charged until the potential difference across the first capacitor 205 substantially reaches the level of the input voltage Vin.
When the charging of the first capacitor 205 is completed, the transistors 201 and 203 are turned off and the switches 202 and 204 are turned on. By this switching, the potential at point C is reduced from the level of the input voltage Vin to the level of the ground voltage GND. Here, since a potential difference equal to the input voltage Vin has been applied across the first capacitor 205 through the charging described above, as the potential at point C is reduced to the level of the ground voltage GND, the potential at point D is also reduced to −Vin (the ground voltage GND minus the charge voltage Vin).
Meanwhile, since point D remains conducting to the output terminal via the switch 202, the electric charge in the second capacitor 206 moves to the first capacitor 205. As a result, a negatively stepped-up voltage −Vin obtained by negatively stepping up the input voltage Vin by a factor of 1 is derived as the output voltage Vout.
Conventionally, many application devices whose driving needs both a positive and a negative internal voltages (for example, liquid crystal display drivers and flash memories) are provided with both a positive and a negative step-up charge pump circuit as described above as means for generating positive and negative internal voltages (see, for example, Patent Publication 1).
As conventional arts related to the present invention, various disclosures and proposals have been made as exemplified by: a semiconductor integrated circuit device in which latchup of a parasitic transistor is prevented (see Patent Publication 2); and a charge pump circuit in which an auxiliary capacitor is connected between the backgate of a transistor constituting a pump cell and the input node, for the purpose of preventing latchup and charge leakage as well as eliminating a lowering of pump efficiency caused by the backgate effect (see Patent Publication 3).
In addition, various disclosures and suggestions have been made related to technologies for improving the start-up characteristic of a charge pump circuit in, for example, Patent Publications 4 and 5.
Patent Publication 1: JP-A-H07-231647
Patent Publication 2: JP-A-H06-216323
Patent Publication 3: JP-A-2000-173288
Patent Publication 4: JP-A-2004-208142
Patent Publication 5: JP-A-H07-322606